CS & IT Engineering: An Introduction to Computer Organization & Architecture (COA)

This article serves as an introductory guide to the fundamental concepts of Computer Organization and Architecture (COA), based on a lecture series. COA is a core subject in Computer Science and IT engineering that bridges the gap between the hardware and software of a computer system. It explains how a computer’s components are designed and how they interact to execute programs.

Course Outline

The lecture series covers a wide range of topics essential for understanding how computers work, broken down as follows:

1. Introduction to COA: Foundational concepts, components of a computer, registers, the instruction cycle, memory concepts, and system buses.
2. Instruction Format & Addressing Modes: How machine instructions are structured and how the CPU accesses data in memory.
3. ALU, Datapath & Control Unit: The core components responsible for processing data and controlling the flow of instructions.
4. Floating Point Representation: How fractional numbers are stored and processed in a computer, including the IEEE 754 standard.
5. Cache Memory: The role of high-speed memory in bridging the speed gap between the CPU and main memory.
6. Pipelining: A technique to improve performance by overlapping the execution of multiple instructions.
7. Secondary Memory & I/O Interface: The concepts of persistent storage and how the computer communicates with external devices.

1. Computer Generations

The evolution of computing is defined by the technology used in its components:

• First Generation (1942-1954): Used vacuum tubes for circuitry and machine language for programming. The first digital computer was ENIAC (Electronic Numerical Integrator And Computer).
• Second Generation (1955-1964): Replaced vacuum tubes with transistors and introduced assembly language.
• Third Generation (1965-1973): Integrated circuits (ICs) were invented, and High-Level Languages (H.L.L) like FORTRAN and COBOL became popular.
• Fourth Generation (1974-Present): The era of Very Large Scale Integration (VLSI) and Ultra Large Scale Integration (ULSI), making microprocessors possible.
• Fifth & Sixth Generation (Present & Future): Defined by High-Level Languages, Object-Oriented Programming (OOP’s), Relational Database Management Systems (RDMS), Artificial Intelligence (AI), and Machine Learning (ML).

2. Components of a Computer

A standard computer system consists of three main parts:

1. Central Processing Unit (CPU): The “brain” of the computer that processes all instructions.
2. Memory: The storage area where data and instructions are kept. This includes both primary (e.g., RAM) and secondary (e.g., hard disk) memory.
3. Input/Output (I/O) Devices: Peripherals that allow the computer to interact with the outside world (e.g., keyboard, monitor).

3. Types of Registers

Registers are small, high-speed storage locations inside the CPU. They are built from flip-flops, where an n-bit register is a collection of n flip-flops. Key registers include:

• Program Counter (PC): Holds the starting address of the next instruction to be fetched and executed.
• Memory Address Register (MAR): Holds the address of a memory location from which data will be read or to which data will be written.
• Memory Buffer Register (MBR) / Memory Data Register (MDR): Holds the data or instruction that has just been read from memory or is waiting to be written to it.
• Instruction Register (IR): Holds the instruction that is currently being executed by the CPU.
• Accumulator (AC): A general-purpose register that often stores the results of arithmetic and logical operations.
• Stack Pointer (SP): Holds the address of the Top of the Stack (TOS) in memory.
• Program Status Word (PSW): Contains status and control bits (e.g., carry flag, zero flag) that reflect the state of the CPU.
• General Purpose Register (GPR): Can be used for any purpose by the programmer.

4. The Instruction Cycle

The Instruction Cycle describes the sequence of steps a processor follows to execute a single instruction. It consists of two main sub-cycles:

1. Fetch Cycle: The objective is to fetch the instruction from the main memory into the CPU.
   • The processor uses the address in the PC to fetch the instruction from memory.
   • The fetched instruction is loaded into the IR.
   • The PC is then incremented to point to the next instruction.
2. Execute Cycle: The objective is to process and execute the fetched instruction. This involves decoding the instruction (determining what to do) and then performing the required action, such as a data transfer or a computation.

5. Memory Concepts

• Byte & Word Addressable: Memory can be organized so that each byte has its own address (Byte Addressable) or so that a larger unit (word) is addressed.
• System Bus: A set of parallel wires that connects the CPU, memory, and I/O devices. It carries data, addresses, and control signals.
• Byte Ordering (Endianness): Refers to the order in which bytes of a multi-byte data word are stored.
  • Little Endian: The least significant byte is stored at the lowest memory address.
  • Big Endian: The most significant byte is stored at the lowest memory address.

6. Types of Memory

• Primary Memory (Main Memory): The main memory that the CPU interacts with directly. It can be volatile (e.g., RAM) or non-volatile (e.g., ROM).
• Cache Memory: A small, extremely fast memory placed between the CPU and main memory. It stores copies of frequently accessed data to speed up processing. Its organization includes:
  • Mapping Techniques: Direct, Associative, and Set-Associative mapping.
  • Replacement Algorithms: LRU, FIFO, Random, used to decide which block to evict from cache.
  • Updating Techniques: Write-through and Write-back policies.

7. Pipeline Concept

Pipelining is a technique where multiple instructions are overlapped in execution. While one instruction is being executed, the next is being decoded, and the one after that is being fetched. Performance is evaluated by analyzing the speedup achieved. Key challenges in pipelining are dependencies and hazards:

• Dependencies:
  • Structural Dependency: Hardware resources are insufficient to support all stages.
  • Data Dependency: An instruction depends on the result of a previous instruction (e.g., RAW – Read After Write).
  • Control Dependency: The flow of execution depends on the outcome of a branch instruction.
• Hazards: Situations that prevent the next instruction in the pipeline from executing in the next clock cycle (e.g., branch hazards).

8. Secondary Memory & I/O Interface

• Disk Concept: HDDs are the primary secondary storage. Key parameters include disk structure (platters, tracks, sectors) and access time (seek time + rotational delay + transfer time).
• I/O Interface: The hardware that allows the CPU to communicate with peripheral devices. Types include Programmed I/O, Interrupt-driven I/O, and Direct Memory Access (DMA).

Practice & Application

The notes include example problems, likely from exams like GATE, which test the understanding of these concepts. These problems often involve:

• Calculating the program counter (PC) value during program execution.
• Calculating the total number of clock cycles for a program based on instruction size and operation times.
• Determining the return address pushed onto the stack when an interrupt occurs.

Recommended Textbooks

For a deeper dive, the lecture series recommends the following standard textbooks:

• Carl Hamacher
• William Stallings
• Morris Mano
• JP Hayes